1. Field of the Invention
The present invention relates to a semiconductor device with a metal/semiconductor interface, and more particularly to a semiconductor device in which a low resistance, tunable contact is formed by means of using a SixGe1xe2x88x92x (0 less than x less than 1) layer.
2. Description of the Prior Art
It has been customary in modern semiconductor manufacturing technique to form MS (metal-semiconductor) contact by forming either an Ohmic contact or a diffusion contact. The former technique is performed by implanting dopants into the MS interface layer to a concentration above solid solubility limit (i.e. N(n,p) greater than 1020 cmxe2x88x923) to form a tunneling barrier. On the other hand, the latter technique is performed by diffusing dopants into the interface layer to lower the Schottky Barrier Height (SBH).
Silicon, a frequently used semiconductor, has a high intrinsic SBH (or Eg (energy gap)), Eg=1.11 eV. Therefore, when silicon is used, a relatively high doping concentration is required at the MS interface layer, which is usually performed using high-energy implantation, to lower the SBH in order to form a better contact. However, the high-energy implantation results in unwanted deep contact junctions, which subjects the device to short channel effect (SCE) or punch-through (leakage).
An object of the present invention is to solve the above-mentioned problems and provide a semiconductor device having a metal/semiconductor interface with low resistance contact.
Another object of the present invention is to provide a process to form a low resistance contact at a metal/semiconductor interface using moderate doping requirements, which in turn protect the device from short channel effect and leakage.
A further object of the present invention is to provide a low resistance, tunable contact suitable for CMOS devices.
To achieve the above objects, the semiconductor device of the present invention includes a semiconductor substrate; a dielectric layer on the semiconductor substrate, having a contact opening exposing the semiconductor substrate; a SixGe1xe2x88x92x layer formed within the contact opening, wherein 0 less than x less than 1; and a metal plug over the SixGe1xe2x88x92x layer filling the contact opening.
The present invention also provides a process to form a metal contact at a metal/semiconductor interface. First, a dielectric layer is formed on a semiconductor substrate. A contact opening is formed in the dielectric layer to expose the semiconductor substrate. A SixGe1xe2x88x92x layer is formed in the contact opening, wherein 0 less than x less than 1. Finally, a metal plug is filled over the SixGe1xe2x88x92x layer into the contact opening.